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# 02, February 2015
УДК: 004.052.4

# 01, January 2013
УДК: 004.052.4
77-30569/373672 Issues of formal verification of engineering systems
Engineering Education # 04, April 2012
Improving the verification of hardware and software systems is associated with the usage of formal methods among which the authors consider the model checking method which provides an automated consideration of all possible "paths of functioning" of the system. The problem of “explosion of the number of states” inherent in the method of verification of model checking is analyzed in the article; various methods of dealing with this problem are discussed. Particular attention is paid to verification of coherence memory protocols; possible approaches to solving this problem are outlined.
77-30569/238113 Metastability in digital devices
Engineering Education # 10, October 2011
 This paper considers the causes of metastability during the interaction of devices controlled with asynchronous clock signals. The article suggests different ways of eliminating metastability and proposes using a FIFO buffer with asynchronous FIFO pointer comparison.
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